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MIC5013
Electrical Characteristics (Note 3, 5)
Test circuit. T A = –55°C to +125°C, V + = 15V , all switches open, unless otherwise speci?ed.
Micrel, Inc.
Parameter
Conditions
Min
Typical
Max
Units
Supply Current, I 7
Logic Input Voltage, V IN
Logic Input Current, I 1
Input Capacitance
V + = 32V
V + = 4.75V
V + =15V
V+ = 32V
Pin 1
V IN = 0V, S4 closed
V IN = V S = 32V
Adjust V IN for V GATE low
Adjust V IN for V GATE high
Adjust V IN for V GATE high
V IN = 0V
V IN = 32V
4.5
5.0
–1
0.1
8
5
10
20
2
1
μA
mA
V
V
V
μA
μA
pF
Gate Drive, V GATE
Zener Clamp,
V GATE – V SOURCE
Gate Turn-on Time, t ON
μs
(Note 4)
Gate Turn-off Time, t OFF
Threshold Bias Voltage, V 2
Current Sense Trip Voltage,
V SENSE – V SOURCE
Peak Current Trip Voltage,
V SENSE – V SOURCE
Fault Output Voltage, V 8
S1, S2 closed, V + = 7V, I 6 = 0
V S = V+, V IN = 5V V + = 15V, I 6 = 100 μA
S2 closed, V IN = 5V V+ = 15V, V S = 15V
V + = 32V, V S = 32V
V IN switched from 0 to 5V; measure time
for V GATE to reach 20V
V IN switched from 5 to 0V; measure time
for V GATE to reach 1V
I 2 = 200 μA
S2 closed, V IN = 5V, V + = 7V, S4 closed
Increase I 3 I 2 = 100 μA V S = 4.9V, S4 open
V + = 15V S4 closed
I 2 = 200 μA V S = 11.8V, S4 open
V + = 32V V S = 0V, S4 open
I 2 = 500 μA V S = 25.5V, S4 open
S3, S4 closed,
V + = 15V, V IN = 5V
V IN = 0V, I 8 = –100 μA
V IN = 5V, I 8 = 100 μA, current sense tripped
13
24
11
11
1.7
75
70
150
140
360
350
1.6
14
15
27
12.5
13
4
2
105
100
210
200
520
500
2.1
0.4
14.6
15
16
60
10
2.2
135
130
270
260
680
650
1
V
V
V
V
200
μs
V
mV
mV
mV
mV
mV
mV
V
V
V
Note 1.
Note 2.
Note 3.
Note 4.
Note 5.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical speci?cations do not apply when
operating the device beyond its speci?ed Operating Ratings .
The MIC5010 is ESD sensitive.
Minimum and maximum Electrical Characteristics are 100% tested at T A = 25°C and T A = 85°C, and 100% guaranteed over the entire
range. Typicals are characterized at 25°C and represent the most likely parametric norm.
Test conditions re?ect worst case high-side driver performance. Low-side and bootstrapped topologies are signi?cantly faster—see
Applications Information .
Speci?cation for packaged product only.
July 2005
3
MIC5013
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